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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-06 19:41:42 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-14 18:18:26 +0000 |
| commit | f555a58abc487270d4ba42527b1b43850bd718c0 (patch) | |
| tree | 5285cf1bb4cc64cedf5c9defa78ea63803aca3e5 /src/southbridge/intel/bd82x6x/early_pch.c | |
| parent | 542fa6de384d4b79d8964512b4088bcd90863bd2 (diff) | |
| download | coreboot-f555a58abc487270d4ba42527b1b43850bd718c0.tar.xz | |
sb/intel/common: Declare common smbus_base() and enable_smbus()
This avoids including platform-specific headers with different
filenames from common code.
Change-Id: Idf9893e55949d63f3ceca2249e618d0f81320321
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38232
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_pch.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 6f06a57129..2213878307 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -18,6 +18,7 @@ #include <cf9_reset.h> #include <ip_checksum.h> #include <device/pci_def.h> +#include <device/smbus_host.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmbase.h> #include <southbridge/intel/common/rcba.h> |