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author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-28 16:04:17 +0200 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-28 17:56:17 +0200 |
commit | a3e41c089602c58409e8dfd4aceecbdd7d4f4a5b (patch) | |
tree | 4302c6c60717b323a12a43fd304cb2e4b39cac42 /src/southbridge/intel/bd82x6x/lpc.c | |
parent | 3c6d36d26fa6a3d195fe455b523f404cf2d646d1 (diff) | |
download | coreboot-a3e41c089602c58409e8dfd4aceecbdd7d4f4a5b.tar.xz |
Migrate 206ax to SMM_MODULES
This gets rid of ugly tseg_relocate for bd82x6x.
This is backport of 29ffa54969414b833de5c61b507b061f920d650b to bd82x6x.
Change-Id: I0f52540851ce8a7edaac257a2aa83d543bb5e530
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10351
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/lpc.c')
-rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 51 |
1 files changed, 5 insertions, 46 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 19e540738c..842d9d994f 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -43,7 +43,6 @@ #define NMI_OFF 0 #define ENABLE_ACPI_MODE_IN_COREBOOT 0 -#define TEST_SMM_FLASH_LOCKDOWN 0 typedef struct southbridge_intel_bd82x6x_config config_t; @@ -427,58 +426,20 @@ static void enable_clock_gating(device_t dev) RCBA32_OR(0x3564, 0x3); } -#if CONFIG_HAVE_SMI_HANDLER -static void pch_lock_smm(struct device *dev) +static void pch_set_acpi_mode(void) { -#if TEST_SMM_FLASH_LOCKDOWN - u8 reg8; -#endif - - if (!acpi_is_wakeup_s3()) { + if (!acpi_is_wakeup_s3() && CONFIG_HAVE_SMI_HANDLER) { #if ENABLE_ACPI_MODE_IN_COREBOOT printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n"); - outb(0xe1, 0xb2); // Enable ACPI mode + outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode printk(BIOS_DEBUG, "done.\n"); #else printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); - outb(0x1e, 0xb2); // Disable ACPI mode + outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode printk(BIOS_DEBUG, "done.\n"); #endif } - - /* Don't allow evil boot loaders, kernels, or - * userspace applications to deceive us: - */ - smm_lock(); - -#if TEST_SMM_FLASH_LOCKDOWN - /* Now try this: */ - printk(BIOS_DEBUG, "Locking BIOS to RO... "); - reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ - printk(BIOS_DEBUG, " BLE: %s; BWE: %s\n", (reg8&2)?"on":"off", - (reg8&1)?"rw":"ro"); - reg8 &= ~(1 << 0); /* clear BIOSWE */ - pci_write_config8(dev, 0xdc, reg8); - reg8 |= (1 << 1); /* set BLE */ - pci_write_config8(dev, 0xdc, reg8); - printk(BIOS_DEBUG, "ok.\n"); - reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ - printk(BIOS_DEBUG, " BLE: %s; BWE: %s\n", (reg8&2)?"on":"off", - (reg8&1)?"rw":"ro"); - - printk(BIOS_DEBUG, "Writing:\n"); - *(volatile u8 *)0xfff00000 = 0x00; - printk(BIOS_DEBUG, "Testing:\n"); - reg8 |= (1 << 0); /* set BIOSWE */ - pci_write_config8(dev, 0xdc, reg8); - - reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ - printk(BIOS_DEBUG, " BLE: %s; BWE: %s\n", (reg8&2)?"on":"off", - (reg8&1)?"rw":"ro"); - printk(BIOS_DEBUG, "Done.\n"); -#endif } -#endif static void pch_disable_smm_only_flashing(struct device *dev) { @@ -572,9 +533,7 @@ static void lpc_init(struct device *dev) pch_disable_smm_only_flashing(dev); -#if CONFIG_HAVE_SMI_HANDLER - pch_lock_smm(dev); -#endif + pch_set_acpi_mode(); pch_fixups(dev); } |