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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-10-09 10:26:32 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-13 21:10:08 +0000 |
| commit | 7630803b85c63fce6e90b3f95e58e8eb7369a912 (patch) | |
| tree | 0938f037d3c6f79768487542c1dae29819541ccb /src/southbridge/intel/bd82x6x/lpc.c | |
| parent | a7fb23081cb03f85de0bd80944089b82af737e3d (diff) | |
| download | coreboot-7630803b85c63fce6e90b3f95e58e8eb7369a912.tar.xz | |
sb/intel: Remove ENABLE_ACPI_MODE_IN_COREBOOT
Change-Id: Ic807f4b4fc26232301f81c8076daf31fe58f217b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36788
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/lpc.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 5f0dd8c299..e7b7db86d8 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -43,8 +43,6 @@ #define NMI_OFF 0 -#define ENABLE_ACPI_MODE_IN_COREBOOT 0 - typedef struct southbridge_intel_bd82x6x_config config_t; /** @@ -421,15 +419,9 @@ static void enable_clock_gating(struct device *dev) static void pch_set_acpi_mode(void) { if (!acpi_is_wakeup_s3() && CONFIG(HAVE_SMI_HANDLER)) { -#if ENABLE_ACPI_MODE_IN_COREBOOT - printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n"); - outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode - printk(BIOS_DEBUG, "done.\n"); -#else printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode printk(BIOS_DEBUG, "done.\n"); -#endif } } |