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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-04-26 22:21:21 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 16:26:43 +0000 |
| commit | 9c5d4634dd39a0d3000a21c8e35a885360731529 (patch) | |
| tree | e65f1d9efe5c361fa39bcf1763077dd11095a7d5 /src/southbridge/intel/bd82x6x/lpc.c | |
| parent | 9ab9db0bc5a1bf8bb35980068a840691d54aa5dd (diff) | |
| download | coreboot-9c5d4634dd39a0d3000a21c8e35a885360731529.tar.xz | |
southbridge/intel: Remove space before/after parenthesis
Change-Id: Id1bc0c88aeecc3f1d12964346326e5b087a2985e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25880
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/lpc.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 8d125eb6d8..ea7a80846c 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -239,7 +239,7 @@ static void pch_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); |