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authorStefan Reinauer <reinauer@chromium.org>2012-06-11 14:13:09 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-24 23:16:29 +0200
commit49058c0adf348342ea23711f018997816da4056b (patch)
treef2c882497733bac60026a7ee083900cbd28af2df /src/southbridge/intel/bd82x6x/me.c
parent999e94cb7a428751cf11be6859dbf29f954bbdc3 (diff)
downloadcoreboot-49058c0adf348342ea23711f018997816da4056b.tar.xz
Fix ME hash functions on Panther Point/Cougar Point
- On Cougar Point there may have been stack corruption during the ME hash verification - On Panther Point the ME firmware hash was not passed on to the OS Change-Id: I73fc10db63ecff939833fb856a6da1e394155043 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1279 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/me.c')
-rw-r--r--src/southbridge/intel/bd82x6x/me.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index a1ae06dfd5..1b7b2623c2 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -621,7 +621,7 @@ static int intel_mei_setup(device_t dev)
static int intel_me_extend_valid(device_t dev)
{
struct me_heres status;
- u32 extend[] = {0};
+ u32 extend[8] = {0};
int i, count = 0;
pci_read_dword_ptr(dev, &status, PCI_ME_HERES);