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| author | John E. Kabat Jr <john.kabat@scarletltd.com> | 2017-11-29 18:49:37 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-12-11 01:07:05 +0000 |
| commit | af32770755211aadcc4e9f578bae38592b61f1cd (patch) | |
| tree | b0e12df29123437b782b6c3de0525e21c0e9e905 /src/southbridge/intel/bd82x6x/me.h | |
| parent | 2464efbca6e78110fd220449bd790a8307c71866 (diff) | |
| download | coreboot-af32770755211aadcc4e9f578bae38592b61f1cd.tar.xz | |
soc/amd/stoneyridge: Enable SPI writes
- Change soc/amd/stoneyridge/Kconfig to set BOOT_DEVICE_SUPPORTS_WRITES
BUG=b:65485690
TEST=Build & boot kahlee.
Change-Id: I595a27ac27daa42c2499de1a343bc30be9a89fa6
Signed-off-by: John E. Kabat Jr <john.kabat@scarletltd.com>
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/me.h')
0 files changed, 0 insertions, 0 deletions