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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-06-11 15:15:46 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-24 23:17:17 +0200 |
| commit | 998f3a27be2a16ae0bc1f193a805b680208d63ab (patch) | |
| tree | eab8d4c149630e72d4ff47e698883ddcbc92f1fc /src/southbridge/intel/bd82x6x/me_8.x.c | |
| parent | 49058c0adf348342ea23711f018997816da4056b (diff) | |
| download | coreboot-998f3a27be2a16ae0bc1f193a805b680208d63ab.tar.xz | |
Cougar/Panther Point: Compile in ME7 and ME8 code at the same time
In the short term there might be devices with Sandy Bridge CPUs
on mainboards with Panther Point PCHes. While this configuration
option is perfectly valid, coreboot currently ties Sandy Bridge to
Cougar Point and Ivy Bridge to Panther Point. One occurence is in
the ME handling code.
To make coreboot most flexible, compile both ME handlers into
coreboot and decide at runtime which one to use.
Change-Id: Icffe2930873f67c99c3f73e37e7a967f4f002b88
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1280
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/me_8.x.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me_8.x.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index c7a69fe5c4..32f660efbc 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -357,7 +357,7 @@ static inline int mei_sendrecv(struct mei_header *mei, struct mkhi_header *mkhi, } /* Send END OF POST message to the ME */ -int mkhi_end_of_post(void) +static int mkhi_end_of_post(void) { struct mkhi_header mkhi = { .group_id = MKHI_GROUP_ID_GEN, @@ -457,8 +457,9 @@ static void me_print_fwcaps(mbp_fw_caps *caps_section) } #endif +#if CONFIG_CHROMEOS && 0 /* DISABLED */ /* Tell ME to issue a global reset */ -int mkhi_global_reset(void) +static int mkhi_global_reset(void) { struct me_global_reset reset = { .request_origin = GLOBAL_RESET_BIOS_POST, @@ -486,10 +487,11 @@ int mkhi_global_reset(void) printk(BIOS_ERR, "ME: Global Reset failed\n"); return -1; } +#endif #ifdef __SMM__ -void intel_me_finalize_smm(void) +void intel_me8_finalize_smm(void) { struct me_hfs hfs; u32 reg32; |