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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-31 19:22:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:22:46 +0200 |
| commit | ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch) | |
| tree | 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/intel/bd82x6x/me_8.x.c | |
| parent | 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff) | |
| download | coreboot-ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1.tar.xz | |
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/bd82x6x/me_8.x.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me_8.x.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 4dbe8edd5b..220a176739 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -703,7 +703,7 @@ static void intel_me_init(device_t dev) if (intel_mei_setup(dev) < 0) break; - if(intel_me_read_mbp(&mbp_data)) + if (intel_me_read_mbp(&mbp_data)) break; #if CONFIG_CHROMEOS && 0 /* DISABLED */ @@ -893,7 +893,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data) default: printk(BIOS_ERR, "ME: unknown mbp item id 0x%x! Skipping\n", mbp_item_id); - while(copy_size--) + while (copy_size--) read_cb(); continue; } @@ -904,7 +904,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data) buffer_room, copy_size, mbp_item_id); return -1; } - while(copy_size--) + while (copy_size--) *copy_addr++ = read_cb(); } @@ -914,7 +914,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data) { int cntr = 0; - while(host.interrupt_generate) { + while (host.interrupt_generate) { read_host_csr(&host); cntr++; } |