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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-06 06:32:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-11-08 07:49:15 +0000
commitc86fc8e63d81251a5da80ed55e4fbc9900a900d9 (patch)
tree66cefc92a8cb97ac02693b4df42ec30fb77337a8 /src/southbridge/intel/bd82x6x/me_status.c
parent82c0e7e3d50cca20ed98d650d511071329e9f3a0 (diff)
downloadcoreboot-c86fc8e63d81251a5da80ed55e4fbc9900a900d9.tar.xz
sb,soc/intel: Reduce preprocessor use with ME debugging
Change-Id: Iedd54730f140b6a7a40834f00d558ed99a345077 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/me_status.c')
-rw-r--r--src/southbridge/intel/bd82x6x/me_status.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/me_status.c b/src/southbridge/intel/bd82x6x/me_status.c
index b202376653..4d9540a074 100644
--- a/src/southbridge/intel/bd82x6x/me_status.c
+++ b/src/southbridge/intel/bd82x6x/me_status.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include "me.h"
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
/* HFS1[3:0] Current Working State Values */
static const char *me_cws_values[] = {
[ME_HFS_CWS_RESET] = "Reset",
@@ -137,11 +136,12 @@ static const char *me_progress_policy_values[] = {
[0x0f] = "ME cannot access the chipset descriptor region",
[0x10] = "Required VSCC values for flash parts do not match",
};
-#endif
void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
{
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL < BIOS_DEBUG)
+ return;
+
/* Check Current States */
printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
hfs->fpt_bad ? "BAD" : "OK");
@@ -204,5 +204,4 @@ void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
printk(BIOS_DEBUG, "Unknown 0x%02x", gmes->current_state);
}
printk(BIOS_DEBUG, "\n");
-#endif
}