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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-07 22:34:33 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 11:53:31 +0000 |
| commit | 1a1b04ea51686226e9dddbd9dd74550b340578a1 (patch) | |
| tree | be754ae1643ee323df8ef78a7b028820cd0456e4 /src/southbridge/intel/bd82x6x/pch.h | |
| parent | fc57d6c4c2848726be1361f6dee3c33e7551b857 (diff) | |
| download | coreboot-1a1b04ea51686226e9dddbd9dd74550b340578a1.tar.xz | |
device/smbus_host: Declare common early SMBus prototypes
Change-Id: I1157cf391178a27db437d1d08ef5cb9333e976d0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index a8c14c96bb..ed75505f65 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -48,10 +48,6 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); void enable_usb_bar(void); -#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -#endif - void early_thermal_init(void); void southbridge_configure_default_intmap(void); void southbridge_rcba_config(void); |