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| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 15:19:32 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:26 +0000 |
| commit | 976200388b6924c7b30c6062b64a8db7e215f37f (patch) | |
| tree | 659eca8c9acac2ffb13492086acca2b60ec099a7 /src/southbridge/intel/bd82x6x/pch.h | |
| parent | cfe7ad1e8f7ed6f3d72db2041bf2051ac88e2a5f (diff) | |
| download | coreboot-976200388b6924c7b30c6062b64a8db7e215f37f.tar.xz | |
southbridge/intel/bd82x6x: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to early_pch_common.c and
add a helper function to determine if failure occurred.
BUG=b:63054105
Change-Id: I710d99551cfb6455244f66b47fcbecc790ae770f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index dcd7b2e130..51f3b94239 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -103,6 +103,9 @@ void early_usb_init (const struct southbridge_usb_port *portmap); #endif + +/* Return non-zero when RTC failure happened. */ +int rtc_failure(void); #endif #define MAINBOARD_POWER_OFF 0 |