diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-03-25 17:05:20 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-16 20:22:54 +0000 |
| commit | bf7435087eee94a6cbd5f50d816fea9168395090 (patch) | |
| tree | 8cf2ca40d7f0c9474f96bd6b671aa8a07bf46129 /src/southbridge/intel/bd82x6x/pch.h | |
| parent | 25b35d317eef9ef5d73bbecc502fdac13a478bf6 (diff) | |
| download | coreboot-bf7435087eee94a6cbd5f50d816fea9168395090.tar.xz | |
sb/intel/sandybridge/early_pch: Make DMI init more readable
Add a few comments and use known register values.
Based on the "2nd Generation Intel® Core™ Processor Family Mobile"
datasheet and the existing serialice trace.
Tested on Lenovo T520 (Intel Sandy Bridge).
Still boots to GNU/Linux.
Change-Id: I404515b77a22324f55581f117d79630be4ba64dd
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32071
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 21b603108a..fb8238ad4f 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -310,6 +310,8 @@ early_usb_init (const struct southbridge_usb_port *portmap); #define IOTR2 0x1e90 /* 64bit */ #define IOTR3 0x1e98 /* 64bit */ +#define VCNEGPND 2 + #define TCTL 0x3000 /* 8bit */ #define NOINT 0 |