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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 16:42:33 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 11:46:26 +0000 |
commit | 9c538348d8ccaef2c3dd6b898a1f44b00ea59690 (patch) | |
tree | 79eac3af79546b14b110b059e31eb18d33de4ce0 /src/southbridge/intel/bd82x6x/pch.h | |
parent | 934b8da442a04978c6320299c616d3e8f05cb731 (diff) | |
download | coreboot-9c538348d8ccaef2c3dd6b898a1f44b00ea59690.tar.xz |
nb/intel/sandybridge: Make the mainboard_rcba_config hook optional
This also changes the name to mainboard_late_rcba_config to better
reflect what it does.
This adds an empty weakly linked default. The rationale behind this
change is that without an implementation of the hook some features
might not work but that the result is likely still able to boot, so it
can be made optional.
Change-Id: I1897d0f5ca7427d304a425f5256cd43c088ff936
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36781
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
-rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index ac976c2982..d4cd86eaa5 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -72,7 +72,9 @@ int smbus_read_byte(unsigned int device, unsigned int address); void early_thermal_init(void); void southbridge_configure_default_intmap(void); void southbridge_rcba_config(void); -void mainboard_rcba_config(void); +/* Optional mainboard hook to do additional configuration + on the RCBA config space. It is called after the raminit. */ +void mainboard_late_rcba_config(void); void early_pch_init_native(void); void early_pch_init(void); void early_pch_init_native_dmi_pre(void); |