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| author | Patrick Rudolph <siro@das-labor.org> | 2016-02-06 17:42:42 +0100 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-02-18 01:35:57 +0100 |
| commit | e8e66f47631c505ab153d8a348058350b9acfe88 (patch) | |
| tree | 535bc168855923222affbf6bdb06620cbd8fb343 /src/southbridge/intel/bd82x6x/pch.h | |
| parent | ffc31d07f7839fa72073aae4ddbbd025ac4a7bac (diff) | |
| download | coreboot-e8e66f47631c505ab153d8a348058350b9acfe88.tar.xz | |
southbridge/intel/bd82x6x: Use common gpio.c
Use shared gpio code from common folder.
Bd82x6x's gpio.c and gpio.h is used by other southbridges
as well and will be removed once it is unused.
Change-Id: I8bd981c4696c174152cf41caefa6c083650d283a
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/13614
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index ba4391d999..b30c48cd80 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -462,22 +462,6 @@ early_usb_init (const struct southbridge_usb_port *portmap); #define XUSB2PRM 0xd4 /* 32bit */ #define USB3PRM 0xdc /* 32bit */ -/* ICH7 GPIOBASE */ -#define GPIO_USE_SEL 0x00 -#define GP_IO_SEL 0x04 -#define GP_LVL 0x0c -#define GPO_BLINK 0x18 -#define GPI_INV 0x2c -#define GPIO_USE_SEL2 0x30 -#define GP_IO_SEL2 0x34 -#define GP_LVL2 0x38 -#define GPIO_USE_SEL3 0x40 -#define GP_IO_SEL3 0x44 -#define GP_LVL3 0x48 -#define GP_RST_SEL1 0x60 -#define GP_RST_SEL2 0x64 -#define GP_RST_SEL3 0x68 - /* ICH7 PMBASE */ #define PM1_STS 0x00 #define WAK_STS (1 << 15) |