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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-06-28 12:22:28 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-07-26 21:42:38 +0200 |
| commit | 8730bf8aad995bf105454ac1a93dee4c7b5565d5 (patch) | |
| tree | 220ba909d23366df20cc793a0a898f09e1f7672f /src/southbridge/intel/bd82x6x/pci.c | |
| parent | 7dc2864be7fcc342bab0c167997803f5faf147a1 (diff) | |
| download | coreboot-8730bf8aad995bf105454ac1a93dee4c7b5565d5.tar.xz | |
bd82x6x: Use CMOS variable if available for power-on on power failure
We used a hard coded value for some reason. Don't do that, but use CMOS
instead.
Modelled after http://review.coreboot.org/#/c/443 to get bd82x6x in
sync.
Change-Id: I36d715310157b9f9074f2a1c80710f85833020b4
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1324
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pci.c')
0 files changed, 0 insertions, 0 deletions