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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-25 08:29:27 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-04 02:32:42 +0000 |
| commit | 4aec34005d58360c503c3b5a2f1ed05efe1afbee (patch) | |
| tree | 607f2ca4834702299808c0c3fde745a88ac34003 /src/southbridge/intel/bd82x6x/pcie.c | |
| parent | dfe8d644598918b6d2da2d075a7ea3433d7ca586 (diff) | |
| download | coreboot-4aec34005d58360c503c3b5a2f1ed05efe1afbee.tar.xz | |
sb/intel/bd82x6x: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: I05f23504148d934109814b8f3c1c2a334366496a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pcie.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pcie.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c index 1f4c157f14..458729d0db 100644 --- a/src/southbridge/intel/bd82x6x/pcie.c +++ b/src/southbridge/intel/bd82x6x/pcie.c @@ -265,13 +265,13 @@ static void pci_init(struct device *dev) } } -static void pch_pcie_enable(device_t dev) +static void pch_pcie_enable(struct device *dev) { /* Power Management init before enumeration */ pch_pcie_pm_early(dev); } -static void pch_pciexp_scan_bridge(device_t dev) +static void pch_pciexp_scan_bridge(struct device *dev) { struct southbridge_intel_bd82x6x_config *config = dev->chip_info; @@ -306,7 +306,8 @@ static const char *pch_pcie_acpi_name(const struct device *dev) return NULL; } -static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void pcie_set_subsystem(struct device *dev, unsigned vendor, + unsigned device) { /* NOTE: This is not the default position! */ if (!vendor || !device) { |