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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-04 00:07:22 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-04 19:10:51 +0200 |
commit | 8e073829ec69ee89b3e91f4c040c96988084a526 (patch) | |
tree | 2e2b378ec66aa3ecd563b253726aae6e71db043a /src/southbridge/intel/bd82x6x/reset.c | |
parent | cb91e1525eb0b81f9bc2e24e3404d6a9efc1cce3 (diff) | |
download | coreboot-8e073829ec69ee89b3e91f4c040c96988084a526.tar.xz |
Add support for Intel Panther Point PCH
Change-Id: Iac3cd25b36493bb203e849674320e113cc5fce32
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/853
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/reset.c')
-rw-r--r-- | src/southbridge/intel/bd82x6x/reset.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/reset.c b/src/southbridge/intel/bd82x6x/reset.c new file mode 100644 index 0000000000..29b69ff43a --- /dev/null +++ b/src/southbridge/intel/bd82x6x/reset.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <reset.h> + +void soft_reset(void) +{ + outb(0x04, 0xcf9); +} + +#if 0 +void hard_reset(void) +{ + /* Try rebooting through port 0xcf9. */ + outb((1 << 2) | (1 << 1), 0xcf9); +} +#endif + +void hard_reset(void) +{ + outb(0x02, 0xcf9); + outb(0x06, 0xcf9); +} |