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| author | Duncan Laurie <dlaurie@chromium.org> | 2012-08-13 09:40:02 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-07 08:28:57 +0100 |
| commit | 4dceba25af5ae025fb2592f478a0f29c0eca7fb5 (patch) | |
| tree | d26116c6b506c401f625bc1db0c8b4f448ab0752 /src/southbridge/intel/bd82x6x/smi.c | |
| parent | 357bb2daf09090192c09ddde501a7e07337614e1 (diff) | |
| download | coreboot-4dceba25af5ae025fb2592f478a0f29c0eca7fb5.tar.xz | |
EC: Prepare to read and log last post code from previous boot
(elog portion, support in EC code pending)
- Use a new EC command to read the last post code
from the previous boot
- If the post code is not well-known final boot
or resume code then log it
Change-Id: Id6249e9a182243eb87c777edd56f48de72125e77
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1703
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/bd82x6x/smi.c')
0 files changed, 0 insertions, 0 deletions