diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-02-10 16:23:00 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-12 07:56:57 +0000 |
| commit | 22ad95394e99f5b3cfe587515f7f6d5642c6cf27 (patch) | |
| tree | e7824e4f992787c13ab192bacd86235060743fd4 /src/southbridge/intel/bd82x6x | |
| parent | 6324759784de0d32e46d8c1af5a2419744a407c9 (diff) | |
| download | coreboot-22ad95394e99f5b3cfe587515f7f6d5642c6cf27.tar.xz | |
sb/intel/x/lpc.c: Drop commented-out `gpio_init` call
Change-Id: I4255c63f87e8243237204ac86eb85e34b5aaa225
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 8bdaa5af88..7f648a9f16 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -529,9 +529,6 @@ static void lpc_init(struct device *dev) printk(BIOS_ERR, "Unknown Chipset: 0x%04x\n", dev->device); } - /* Set the state of the GPIO lines. */ - //gpio_init(dev); - /* Initialize the real time clock. */ sb_rtc_init(); |