diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-28 16:33:33 +0300 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-01-10 11:15:10 +0000 |
| commit | 3139c8dc05a363810b4dd9c45f01667760e22a58 (patch) | |
| tree | 76223cd373d4b1dd8c94efcaef3fc2ad13cb6546 /src/southbridge/intel/bd82x6x | |
| parent | fb777b5da8ea7426cf8e9af2876a724c1f067ba9 (diff) | |
| download | coreboot-3139c8dc05a363810b4dd9c45f01667760e22a58.tar.xz | |
ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations
Allocation now happens prior to device enumeration. The
step cbmem_add() is a no-op here, if reached for some
boards. The memset() here is also redundant and becomes
harmful with followup works, as it would wipe out the
CBMEM console and ChromeOS related fields without them
being set again.
Change-Id: I9b2625af15cae90b9c1eb601e606d0430336609f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48701
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 4515261ad2..0a99d80620 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -642,12 +642,16 @@ static void pch_lpc_enable(struct device *dev) pch_enable(dev); } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs) { - memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); |