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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-13 13:45:42 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-16 08:01:55 +0000 |
| commit | 94464474756f0cacdf04a70b95ec4a0462516a63 (patch) | |
| tree | 95d042373ec67650529d7eea8c273de903edeac5 /src/southbridge/intel/bd82x6x | |
| parent | f3973bd4cf83b41a2fb37806948b6dbccfbf367a (diff) | |
| download | coreboot-94464474756f0cacdf04a70b95ec4a0462516a63.tar.xz | |
sb/intel: Clean up some SMI enables
Change-Id: I191ad709fd3c6f906cd34b0053eeaebdb80d410d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 8 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 2 |
2 files changed, 2 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index c0f62bd7fb..5e28cd2bc2 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -231,12 +231,8 @@ static void pch_power_options(struct device *dev) reg16 = pci_read_config16(dev, GEN_PMCON_1); reg16 &= ~(3 << 0); // SMI# rate 1 minute reg16 &= ~(1 << 10); // Disable BIOS_PCI_EXP_EN for native PME -#if DEBUG_PERIODIC_SMIS - /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using - * periodic SMIs. - */ - reg16 |= (3 << 0); // Periodic SMI every 8s -#endif + if (CONFIG(DEBUG_PERIODIC_SMI)) + reg16 |= (3 << 0); // Periodic SMI every 8s pci_write_config16(dev, GEN_PMCON_1, reg16); // Set the board's GPI routing. diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 35c7889245..a8c14c96bb 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -40,8 +40,6 @@ #endif #ifndef __ACPI__ -#define DEBUG_PERIODIC_SMIS 0 - int pch_silicon_revision(void); int pch_silicon_type(void); |