summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-03-26 11:01:33 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-04-06 07:10:40 +0000
commitb324df6a540d154cc9267c0398654f9142aae052 (patch)
tree92d40421578cb31c6581fd005ab093728adeb197 /src/southbridge/intel/bd82x6x
parente22c597bf64413ee4329c8869484d8a1f290f217 (diff)
downloadcoreboot-b324df6a540d154cc9267c0398654f9142aae052.tar.xz
arch/x86: Provide readXp/writeXp helpers in arch/mmio.h
These p-suffixed helpers allow dropping pointer casts in call-sites, which is particularly useful when accessing registers at an offset from a base address. Move existing helpers in chipset code to arch/mmio.h and create the rest accordingly. Change-Id: I36a015456f7b0af1f1bf2fdff9e1ccd1e3b11747 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51862 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/early_thermal.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c
index d0051355da..32ad3c2042 100644
--- a/src/southbridge/intel/bd82x6x/early_thermal.c
+++ b/src/southbridge/intel/bd82x6x/early_thermal.c
@@ -6,21 +6,6 @@
#include "cpu/intel/model_206ax/model_206ax.h"
#include <cpu/x86/msr.h>
-static void write8p(uintptr_t addr, uint8_t val)
-{
- write8((uint8_t *)addr, val);
-}
-
-static void write16p(uintptr_t addr, uint16_t val)
-{
- write16((uint16_t *)addr, val);
-}
-
-static uint16_t read16p(uintptr_t addr)
-{
- return read16((uint16_t *)addr);
-}
-
/* Temporary address for the thermal BAR */
#define TBARB_TEMP 0x40000000