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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-03 21:54:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-07 18:08:03 +0200 |
| commit | 035df005c5b9b473c2d61601c098792a34527a52 (patch) | |
| tree | 0c2afbd8f6dc4d773ee4a720a4348ba254a78104 /src/southbridge/intel/bd82x6x | |
| parent | c44fb50185571b6bdf4febcc4cc1476a79c67ae2 (diff) | |
| download | coreboot-035df005c5b9b473c2d61601c098792a34527a52.tar.xz | |
src/southbridge: Remove whitespace after sizeof
Change-Id: Ic3b599d49a4c03ad8035c558b975f31cb91d253b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16862
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 9041816ba1..623482e679 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -653,7 +653,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) static void southbridge_inject_dsdt(device_t dev) { - global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); void *opregion; /* Calling northbridge code as gnvs contains opregion address. */ @@ -661,7 +661,7 @@ static void southbridge_inject_dsdt(device_t dev) if (gnvs) { const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); - memset(gnvs, 0, sizeof (*gnvs)); + memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); |