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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-20 11:14:25 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-21 20:50:49 +0200 |
| commit | 11b01a957439d0406b607ee8c8160e319672bf45 (patch) | |
| tree | 3aa0702209aeba5a38ee11e80bcb77ea2177468f /src/southbridge/intel/bd82x6x | |
| parent | b890a1228d22b2d48792575986d4750e88751c8b (diff) | |
| download | coreboot-11b01a957439d0406b607ee8c8160e319672bf45.tar.xz | |
Kill ENABLE_TPM.
It's used only in P470 and lynxpoint machines. Remove it from other
southbridges. New machines should use src/drivers/pc80/tpm.
Change-Id: I4741e76df4c6204d65562f016abac9ed60558432
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10268
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/lpc.asl | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl index 432f3af706..83c04d5045 100644 --- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl +++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl @@ -220,28 +220,4 @@ Device (LPCB) } #include "acpi/superio.asl" - -#ifdef ENABLE_TPM - Device (TPM) // Trusted Platform Module - { - Name(_HID, EISAID("IFX0102")) - Name(_CID, 0x310cd041) - Name(_UID, 1) - - Method(_STA, 0) - { - If (TPMP) { - Return (0xf) - } - Return (0x0) - } - - Name(_CRS, ResourceTemplate() { - IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) - IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) - Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } - }) - } -#endif } |