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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-06-11 15:38:15 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-07-24 19:53:13 +0200 |
| commit | 6097e193fc708942931fd60ad40d40e95550ecb0 (patch) | |
| tree | 4d20e002bef9beeb0e64ceae79e5ea850c8e66bd /src/southbridge/intel/bd82x6x | |
| parent | 3a8cad3c146265ec614ac8623cf6db94d0ab2ed3 (diff) | |
| download | coreboot-6097e193fc708942931fd60ad40d40e95550ecb0.tar.xz | |
Make ACPI code detect Sandy/Ivy Bridge dynamically
On systems with socketed CPUs we want to be able to
drop in a Sandy Bridge or Ivy Bridge CPU without recompiling the
firmware. Hence, detect the north bridge dynamically. In order
for this to work, we need Ivy Bridge MRC and coreboot configured
for Ivy Bridge.
Change-Id: I635bef2c61d47d36a3fdd87f8ecb6e69097ba969
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1281
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
0 files changed, 0 insertions, 0 deletions