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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-06 12:31:34 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-09 21:25:41 +0000
commit1cae45432e90488c2e9e9ce635fece26ca4c2268 (patch)
tree14b3c1a7d47c8c1b41aba64d6f72050a74a9625c /src/southbridge/intel/bd82x6x
parent5e9ae0c2bcabf3f2226265fcd8ce643ed97f1567 (diff)
downloadcoreboot-1cae45432e90488c2e9e9ce635fece26ca4c2268.tar.xz
device,sb/intel: Move SMBus host controller prototypes
Also change some of the types to match the register widths of the controller. It is expected that these prototypes will be used with SMBus host controllers inside AMD chipsets as well, thus the change of location. Change-Id: I88fe834f3eee7b7bfeff02f91a1c25bb5aee9b65 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38226 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/early_smbus.c1
-rw-r--r--src/southbridge/intel/bd82x6x/smbus.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c
index f5700401be..61625ccdf3 100644
--- a/src/southbridge/intel/bd82x6x/early_smbus.c
+++ b/src/southbridge/intel/bd82x6x/early_smbus.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 4fb7539889..0a9c17598e 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -22,6 +22,7 @@
#include <device/pci_ops.h>
#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
static void pch_smbus_init(struct device *dev)