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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-12-01 12:19:52 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-13 09:30:54 +0000 |
| commit | 0c22d2fe46fbc59fa12fec46c21874f422b10e44 (patch) | |
| tree | 56d001f97110805286469be248de0790d3eed7d4 /src/southbridge/intel/bd82x6x | |
| parent | 9005071c5fb1d75b2a54aa0b3e7af47e25d2de54 (diff) | |
| download | coreboot-0c22d2fe46fbc59fa12fec46c21874f422b10e44.tar.xz | |
{bd82x6x,i82801gx,ibexpeak,lynxpoint}: Remove dead code and use macro
Use BIOS_CNTL defined macro instead of magic number.
Change-Id: I0d2b555ada9c2893af4f85422128f5a8b04e2fc6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index f7bb7e4303..773750186f 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -436,9 +436,9 @@ static void pch_disable_smm_only_flashing(struct device *dev) u8 reg8; printk(BIOS_SPEW, "Enabling BIOS updates outside of SMM... "); - reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ + reg8 = pci_read_config8(dev, BIOS_CNTL); reg8 &= ~(1 << 5); - pci_write_config8(dev, 0xdc, reg8); + pci_write_config8(dev, BIOS_CNTL, reg8); } static void pch_fixups(struct device *dev) |