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authorElyes HAOUAS <ehaouas@noos.fr>2018-05-22 12:51:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-04 08:52:13 +0000
commit448d9fb4310eb8c390020c64af703060ab3545a6 (patch)
treea2b820d5aee80f3de5798584c257c9ec894ffa57 /src/southbridge/intel/bd82x6x
parent7154ef2fe155ce34517c8f893ffec6bc1500e6ac (diff)
downloadcoreboot-448d9fb4310eb8c390020c64af703060ab3545a6.tar.xz
src: Use "foo *bar" instead of "foo* bar"
Change-Id: Ib2bb6cc80ac2bdc389c60c7ffac4bba937f0fca8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26461 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/me_8.x.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 54a16ce622..0334af3e80 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -830,7 +830,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data)
memset(mbp_data, 0, sizeof(*mbp_data));
while (mbp_hdr.num_entries--) {
- u32* copy_addr;
+ u32 *copy_addr;
u32 copy_size, buffer_room;
void *p;