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authorPatrick Georgi <pgeorgi@google.com>2020-05-10 16:41:01 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-11 17:11:40 +0000
commit6b5bc77c9b22c398262ff3f4dae3e14904c57366 (patch)
treeab40c703d92f906f8604635f091f809b59233efa /src/southbridge/intel/bd82x6x
parenta83c6bc907b8ef77935ba62789bc4ed60716986d (diff)
downloadcoreboot-6b5bc77c9b22c398262ff3f4dae3e14904c57366.tar.xz
treewide: Remove "this file is part of" lines
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig1
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/audio.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/globalnvs.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/irqlinks.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/lpc.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/pch.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/sata.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/usb.asl1
-rw-r--r--src/southbridge/intel/bd82x6x/azalia.c1
-rw-r--r--src/southbridge/intel/bd82x6x/bootblock.c1
-rw-r--r--src/southbridge/intel/bd82x6x/chip.h1
-rw-r--r--src/southbridge/intel/bd82x6x/early_me.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_me_mrc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_rcba.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_smbus.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_thermal.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_usb.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_usb_mrc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/elog.c1
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me.h1
-rw-r--r--src/southbridge/intel/bd82x6x/me_8.x.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me_status.c1
-rw-r--r--src/southbridge/intel/bd82x6x/nvs.h1
-rw-r--r--src/southbridge/intel/bd82x6x/pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h1
-rw-r--r--src/southbridge/intel/bd82x6x/pci.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c1
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c1
-rw-r--r--src/southbridge/intel/bd82x6x/smbus.c1
-rw-r--r--src/southbridge/intel/bd82x6x/smihandler.c1
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c1
-rw-r--r--src/southbridge/intel/bd82x6x/usb_xhci.c1
36 files changed, 0 insertions, 36 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index b6478aedca..ed24e778d7 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -1,5 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
config SOUTHBRIDGE_INTEL_BD82X6X
bool
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index ca4ac749f7..9e34e96711 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -1,5 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y)
diff --git a/src/southbridge/intel/bd82x6x/acpi/audio.asl b/src/southbridge/intel/bd82x6x/acpi/audio.asl
index fbd60c6512..6a9832de53 100644
--- a/src/southbridge/intel/bd82x6x/acpi/audio.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/audio.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Intel PCH HDA */
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index 8e99d49045..468e07b189 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Global Variables */
diff --git a/src/southbridge/intel/bd82x6x/acpi/irqlinks.asl b/src/southbridge/intel/bd82x6x/acpi/irqlinks.asl
index a711a03b09..3f3386d908 100644
--- a/src/southbridge/intel/bd82x6x/acpi/irqlinks.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/irqlinks.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (LNKA)
{
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 5b16c5e032..4591bb06ec 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
// Intel LPC Bus Device - 0:1f.0
diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl
index c0e223b98a..4f08a64e8a 100644
--- a/src/southbridge/intel/bd82x6x/acpi/pch.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Intel Cougar Point PCH support */
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/southbridge/intel/bd82x6x/acpi/sata.asl b/src/southbridge/intel/bd82x6x/acpi/sata.asl
index 7355a5494d..43389cf4ad 100644
--- a/src/southbridge/intel/bd82x6x/acpi/sata.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/sata.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
// Intel SATA Controller 0:1f.2
diff --git a/src/southbridge/intel/bd82x6x/acpi/usb.asl b/src/southbridge/intel/bd82x6x/acpi/usb.asl
index 458c1cd4c6..309053ffb7 100644
--- a/src/southbridge/intel/bd82x6x/acpi/usb.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/usb.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Intel Cougar Point USB support */
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index 0466d3109c..0b460d9b0d 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index ef2ee0e55a..ab5cbf0ef9 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h
index 94715de8dc..45f1226bdc 100644
--- a/src/southbridge/intel/bd82x6x/chip.h
+++ b/src/southbridge/intel/bd82x6x/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H
#define SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H
diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c
index 184f72ad32..83639a46d3 100644
--- a/src/southbridge/intel/bd82x6x/early_me.c
+++ b/src/southbridge/intel/bd82x6x/early_me.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/early_me_mrc.c b/src/southbridge/intel/bd82x6x/early_me_mrc.c
index 7e72aa9b74..0b11fd0e81 100644
--- a/src/southbridge/intel/bd82x6x/early_me_mrc.c
+++ b/src/southbridge/intel/bd82x6x/early_me_mrc.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index bd507c489b..452adb1033 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/mmio.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c
index 61877bb93d..1956cb6eac 100644
--- a/src/southbridge/intel/bd82x6x/early_rcba.c
+++ b/src/southbridge/intel/bd82x6x/early_rcba.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c
index 0275078129..3e94c150e6 100644
--- a/src/southbridge/intel/bd82x6x/early_smbus.c
+++ b/src/southbridge/intel/bd82x6x/early_smbus.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/pci_ids.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c
index 60c08d136d..0abd85cbbb 100644
--- a/src/southbridge/intel/bd82x6x/early_thermal.c
+++ b/src/southbridge/intel/bd82x6x/early_thermal.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
#include <device/mmio.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c
index 31aad178fc..8740dcf0c1 100644
--- a/src/southbridge/intel/bd82x6x/early_usb.c
+++ b/src/southbridge/intel/bd82x6x/early_usb.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/mmio.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
index 719f94b067..0896a4d966 100644
--- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c
+++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/pci_ops.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index 241c1a0d83..c130958191 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <acpi/acpi.h>
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 1100544707..0341de2fdc 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index ae62638f1b..e1a1edc5ab 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* This is a ramstage driver for the Intel Management Engine found in the
diff --git a/src/southbridge/intel/bd82x6x/me.h b/src/southbridge/intel/bd82x6x/me.h
index 2794f9bd62..5aaf661041 100644
--- a/src/southbridge/intel/bd82x6x/me.h
+++ b/src/southbridge/intel/bd82x6x/me.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef _INTEL_ME_H
#define _INTEL_ME_H
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index b529fe295f..56303e1c78 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* This is a ramstage driver for the Intel Management Engine found in the
diff --git a/src/southbridge/intel/bd82x6x/me_status.c b/src/southbridge/intel/bd82x6x/me_status.c
index a429f488cb..52a68cee74 100644
--- a/src/southbridge/intel/bd82x6x/me_status.c
+++ b/src/southbridge/intel/bd82x6x/me_status.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include "me.h"
diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h
index 25c392d7f1..9dc65c4084 100644
--- a/src/southbridge/intel/bd82x6x/nvs.h
+++ b/src/southbridge/intel/bd82x6x/nvs.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <commonlib/helpers.h>
#include <stdint.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index cb3188052b..4fb77a1795 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <delay.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index a452263645..35c7889245 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
#define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
diff --git a/src/southbridge/intel/bd82x6x/pci.c b/src/southbridge/intel/bd82x6x/pci.c
index 459ed4648d..6b36a4b0a8 100644
--- a/src/southbridge/intel/bd82x6x/pci.c
+++ b/src/southbridge/intel/bd82x6x/pci.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 7baf67d3c7..15c79ba440 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 57eb7e75a1..27b4d16bc5 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/mmio.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 11568b3096..6e5be9b484 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/device.h>
#include <device/path.h>
diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c
index b2b635fcbc..f778f7aec1 100644
--- a/src/southbridge/intel/bd82x6x/smihandler.c
+++ b/src/southbridge/intel/bd82x6x/smihandler.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index b9069376d7..0f3a1b9ca3 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index a562db2e52..db925e0df0 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>