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authorArthur Heymans <arthur@aheymans.xyz>2018-12-25 15:26:58 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-29 07:18:55 +0000
commitf0a017fe8288e16adbecf8998e99c2cadc3e12de (patch)
treedd058a40a224d25ef0836aa28db2ad1bb188cca2 /src/southbridge/intel/bd82x6x
parent9895177517a796093ef11616bff8a35b0437610f (diff)
downloadcoreboot-f0a017fe8288e16adbecf8998e99c2cadc3e12de.tar.xz
sb/intel/bd828x6x: Make CONFIG_ELOG=y compile
The function pch_log_state() was overlooked when making the smi relocation code common. Change-Id: I878772f1a93105b828e50f37e105d04988ba0bdf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/elog.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h3
2 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index 3299d4b9d1..2ccdf83c4d 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -21,6 +21,7 @@
#include <stdint.h>
#include <string.h>
#include <elog.h>
+#include <southbridge/intel/common/pmutil.h>
#include "pch.h"
void pch_log_state(void)
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 280ac7d6ef..ff55c393d7 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -66,9 +66,6 @@ int pch_silicon_revision(void);
int pch_silicon_type(void);
int pch_silicon_supported(int type, int rev);
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
-#if IS_ENABLED(CONFIG_ELOG)
-void pch_log_state(void);
-#endif
#else /* __PRE_RAM__ */
void enable_smbus(void);
void enable_usb_bar(void);