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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-06 06:32:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-11-08 07:49:15 +0000
commitc86fc8e63d81251a5da80ed55e4fbc9900a900d9 (patch)
tree66cefc92a8cb97ac02693b4df42ec30fb77337a8 /src/southbridge/intel/bd82x6x
parent82c0e7e3d50cca20ed98d650d511071329e9f3a0 (diff)
downloadcoreboot-c86fc8e63d81251a5da80ed55e4fbc9900a900d9.tar.xz
sb,soc/intel: Reduce preprocessor use with ME debugging
Change-Id: Iedd54730f140b6a7a40834f00d558ed99a345077 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/me.c25
-rw-r--r--src/southbridge/intel/bd82x6x/me_8.x.c22
-rw-r--r--src/southbridge/intel/bd82x6x/me_status.c7
3 files changed, 24 insertions, 30 deletions
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index ea60085624..5e355a110f 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -60,11 +60,13 @@ static const char *me_bios_path_values[] = {
/* MMIO base address for MEI interface */
static u32 *mei_base_address;
-#if CONFIG(DEBUG_INTEL_ME)
static void mei_dump(void *ptr, int dword, int offset, const char *type)
{
struct mei_csr *csr;
+ if (!CONFIG(DEBUG_INTEL_ME))
+ return;
+
printk(BIOS_SPEW, "%-9s[%02x] : ", type, offset);
switch (offset) {
@@ -90,9 +92,6 @@ static void mei_dump(void *ptr, int dword, int offset, const char *type)
break;
}
}
-#else
-# define mei_dump(ptr,dword,offset,type) do {} while (0)
-#endif
/*
* ME/MEI access helpers using memcpy to avoid aliasing.
@@ -373,9 +372,8 @@ static int mkhi_end_of_post(void)
}
#endif
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) && !defined(__SMM__)
/* Get ME firmware version */
-static int mkhi_get_fw_version(void)
+static int __unused mkhi_get_fw_version(void)
{
struct me_fw_version version;
struct mkhi_header mkhi = {
@@ -412,7 +410,7 @@ static inline void print_cap(const char *name, int state)
}
/* Get ME Firmware Capabilities */
-static int mkhi_get_fwcaps(void)
+static int __unused mkhi_get_fwcaps(void)
{
u32 rule_id = 0;
struct me_fwcaps cap;
@@ -454,7 +452,6 @@ static int mkhi_get_fwcaps(void)
return 0;
}
-#endif
#if CONFIG(CHROMEOS) && 0 /* DISABLED */
/* Tell ME to issue a global reset */
@@ -714,12 +711,12 @@ static void intel_me_init(struct device *dev)
if (intel_mei_setup(dev) < 0)
break;
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
- /* Print ME firmware version */
- mkhi_get_fw_version();
- /* Print ME firmware capabilities */
- mkhi_get_fwcaps();
-#endif
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
+ /* Print ME firmware version */
+ mkhi_get_fw_version();
+ /* Print ME firmware capabilities */
+ mkhi_get_fwcaps();
+ }
/*
* Leave the ME unlocked in this path.
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 54c3fff05c..c224cb4903 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -62,11 +62,14 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data);
/* MMIO base address for MEI interface */
static u32 *mei_base_address;
-#if CONFIG(DEBUG_INTEL_ME)
+
static void mei_dump(void *ptr, int dword, int offset, const char *type)
{
struct mei_csr *csr;
+ if (!CONFIG(DEBUG_INTEL_ME))
+ return;
+
printk(BIOS_SPEW, "%-9s[%02x] : ", type, offset);
switch (offset) {
@@ -92,9 +95,6 @@ static void mei_dump(void *ptr, int dword, int offset, const char *type)
break;
}
}
-#else
-# define mei_dump(ptr,dword,offset,type) do {} while (0)
-#endif
/*
* ME/MEI access helpers using memcpy to avoid aliasing.
@@ -350,14 +350,13 @@ static inline int mei_sendrecv(struct mei_header *mei, struct mkhi_header *mkhi,
return 0;
}
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) && !defined(__SMM__)
static inline void print_cap(const char *name, int state)
{
printk(BIOS_DEBUG, "ME Capability: %-41s : %sabled\n",
name, state ? " en" : "dis");
}
-static void me_print_fw_version(mbp_fw_version_name *vers_name)
+static void __unused me_print_fw_version(mbp_fw_version_name *vers_name)
{
if (!vers_name->major_version) {
printk(BIOS_ERR, "ME: mbp missing version report\n");
@@ -395,7 +394,7 @@ static int mkhi_get_fwcaps(mefwcaps_sku *cap)
}
/* Get ME Firmware Capabilities */
-static void me_print_fwcaps(mbp_fw_caps *caps_section)
+static void __unused me_print_fwcaps(mbp_fw_caps *caps_section)
{
mefwcaps_sku *cap = &caps_section->fw_capabilities;
if (!caps_section->available) {
@@ -421,7 +420,6 @@ static void me_print_fwcaps(mbp_fw_caps *caps_section)
print_cap("TLS", cap->tls);
print_cap("Wireless LAN (WLAN)", cap->wlan);
}
-#endif
#if CONFIG(CHROMEOS) && 0 /* DISABLED */
/* Tell ME to issue a global reset */
@@ -719,10 +717,10 @@ static void intel_me_init(struct device *dev)
}
#endif
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
- me_print_fw_version(&mbp_data.fw_version_name);
- me_print_fwcaps(&mbp_data.fw_caps_sku);
-#endif
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
+ me_print_fw_version(&mbp_data.fw_version_name);
+ me_print_fwcaps(&mbp_data.fw_caps_sku);
+ }
/*
* Leave the ME unlocked in this path.
diff --git a/src/southbridge/intel/bd82x6x/me_status.c b/src/southbridge/intel/bd82x6x/me_status.c
index b202376653..4d9540a074 100644
--- a/src/southbridge/intel/bd82x6x/me_status.c
+++ b/src/southbridge/intel/bd82x6x/me_status.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include "me.h"
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
/* HFS1[3:0] Current Working State Values */
static const char *me_cws_values[] = {
[ME_HFS_CWS_RESET] = "Reset",
@@ -137,11 +136,12 @@ static const char *me_progress_policy_values[] = {
[0x0f] = "ME cannot access the chipset descriptor region",
[0x10] = "Required VSCC values for flash parts do not match",
};
-#endif
void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
{
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL < BIOS_DEBUG)
+ return;
+
/* Check Current States */
printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
hfs->fpt_bad ? "BAD" : "OK");
@@ -204,5 +204,4 @@ void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
printk(BIOS_DEBUG, "Unknown 0x%02x", gmes->current_state);
}
printk(BIOS_DEBUG, "\n");
-#endif
}