summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/common/firmware
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2018-09-19 10:09:16 +0200
committerNico Huber <nico.h@gmx.de>2018-09-20 10:13:25 +0000
commit5ef3460d49749274bc0936d520a36205c859181c (patch)
tree6ca4ae7e61d3a253b0c94970722cea7ebae1ac66 /src/southbridge/intel/common/firmware
parent638bd13a656e9bbf077d2ab3d707ea09e715d388 (diff)
downloadcoreboot-5ef3460d49749274bc0936d520a36205c859181c.tar.xz
sb/intel/common/firmware: Ensure warning is put late
Change-Id: I400de0a622c2b45ea5ef1f1446f4f489ac397c32 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28673 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common/firmware')
-rw-r--r--src/southbridge/intel/common/firmware/Makefile.inc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc
index 01a80614e3..774bb2391a 100644
--- a/src/southbridge/intel/common/firmware/Makefile.inc
+++ b/src/southbridge/intel/common/firmware/Makefile.inc
@@ -23,7 +23,7 @@ ifeq ($(CONFIG_HAVE_INTEL_FIRMWARE),y)
ifeq ($(CONFIG_HAVE_IFD_BIN),y)
INTERMEDIATE+=add_intel_firmware
else ifeq ($(CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED),y)
-INTERMEDIATE += warn_intel_firmware
+files_added:: warn_intel_firmware
endif
IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)
@@ -89,7 +89,7 @@ endif
warn_intel_firmware:
printf "\n\t** WARNING **\n"
- printf "coreboot will be built without an Intel Firmware Descriptor.\n"
+ printf "coreboot has been built without an Intel Firmware Descriptor.\n"
printf "Never write a complete coreboot.rom without an IFD to your\n"
printf "board's flash chip! You can use flashrom's IFD or layout\n"
printf "parameters to flash only to the BIOS region.\n\n"