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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-11 09:39:43 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-17 07:00:37 +0000
commita4dd33cc8b52f686908590bb41b1c69a9b6c5db5 (patch)
tree95cf94c3ff438647096ff3300f0972b2f5b797e3 /src/southbridge/intel/common/pciehp.c
parenta3022056a2d16b92cc0cdf5eafa4e6369c09e716 (diff)
downloadcoreboot-a4dd33cc8b52f686908590bb41b1c69a9b6c5db5.tar.xz
src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers
Change-Id: Id3390c5ac6a9517ffc2d202f41802e6f4d2e314c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44371 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common/pciehp.c')
-rw-r--r--src/southbridge/intel/common/pciehp.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index 5556aba3a0..247bf5df7f 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -5,6 +5,7 @@
#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include "pciehp.h"
@@ -121,7 +122,7 @@ static void slot_dev_read_resources(struct device *dev)
{
struct resource *resource;
- resource = new_resource(dev, 0x10);
+ resource = new_resource(dev, PCI_BASE_ADDRESS_0);
resource->size = 1 << 23;
resource->align = 22;
resource->gran = 22;