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| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/southbridge/intel/common/pmutil.h | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
| download | coreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.xz | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/common/pmutil.h')
| -rw-r--r-- | src/southbridge/intel/common/pmutil.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h index 7f07a724a3..eb74aa57ce 100644 --- a/src/southbridge/intel/common/pmutil.h +++ b/src/southbridge/intel/common/pmutil.h @@ -69,13 +69,13 @@ #define LV2 0x14 #define LV3 0x15 #define LV4 0x16 -#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) +#if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #define PM2_CNT 0x20 // mobile only #define GPE0_STS 0x28 #else #define PM2_CNT 0x50 // mobile only #define GPE0_STS 0x20 -#endif /* IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) */ +#endif /* CONFIG(SOUTHBRIDGE_INTEL_I82801GX) */ #define USB4_STS (1 << 14) /* i82801gx only */ #define PME_B0_STS (1 << 13) #define PME_STS (1 << 11) @@ -86,11 +86,11 @@ #define TCOSCI_STS (1 << 6) #define SWGPE_STS (1 << 2) #define HOT_PLUG_STS (1 << 1) -#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) +#if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #define GPE0_EN 0x2c #else #define GPE0_EN 0x28 -#endif /* IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) */ +#endif /* CONFIG(SOUTHBRIDGE_INTEL_I82801GX) */ #define PME_B0_EN (1 << 13) #define PME_EN (1 << 11) #define TCOSCI_EN (1 << 6) |