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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-06 12:31:34 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-09 21:25:41 +0000 |
| commit | 1cae45432e90488c2e9e9ce635fece26ca4c2268 (patch) | |
| tree | 14b3c1a7d47c8c1b41aba64d6f72050a74a9625c /src/southbridge/intel/common/smbus.h | |
| parent | 5e9ae0c2bcabf3f2226265fcd8ce643ed97f1567 (diff) | |
| download | coreboot-1cae45432e90488c2e9e9ce635fece26ca4c2268.tar.xz | |
device,sb/intel: Move SMBus host controller prototypes
Also change some of the types to match the register widths
of the controller. It is expected that these prototypes
will be used with SMBus host controllers inside AMD chipsets
as well, thus the change of location.
Change-Id: I88fe834f3eee7b7bfeff02f91a1c25bb5aee9b65
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38226
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common/smbus.h')
| -rw-r--r-- | src/southbridge/intel/common/smbus.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/src/southbridge/intel/common/smbus.h b/src/southbridge/intel/common/smbus.h index c70a3ee596..20443e1060 100644 --- a/src/southbridge/intel/common/smbus.h +++ b/src/southbridge/intel/common/smbus.h @@ -32,22 +32,4 @@ #define SMBUS_PIN_CTL 0xf #define SMBSLVCMD 0x11 -int do_smbus_read_byte(unsigned int smbus_base, u8 device, - unsigned int address); -int do_smbus_write_byte(unsigned int smbus_base, u8 device, - unsigned int address, unsigned int data); -int do_smbus_read_word(unsigned int smbus_base, u8 device, - unsigned int address); -int do_smbus_write_word(unsigned int smbus_base, u8 device, - unsigned int address, unsigned int data); - -int do_smbus_block_read(unsigned int smbus_base, u8 device, - u8 cmd, unsigned int max_bytes, u8 *buf); -int do_smbus_block_write(unsigned int smbus_base, u8 device, - u8 cmd, unsigned int bytes, const u8 *buf); -/* Only since ICH5 */ -int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, - unsigned int offset, unsigned int bytes, u8 *buf); -int do_i2c_block_write(unsigned int smbus_base, u8 device, - unsigned int bytes, u8 *buf); #endif |