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| author | Aaron Durbin <adurbin@chromium.org> | 2015-09-02 17:34:04 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-04 21:01:58 +0000 |
| commit | 4d3de7e328fd92498fd7cf149a0aa887e33f8dfd (patch) | |
| tree | ee9d7e90560ce453a801eb09f2c02a5b5c86a50b /src/southbridge/intel/common/spi.c | |
| parent | c6a177d50064a22215c8f682e1d16043d5470fa8 (diff) | |
| download | coreboot-4d3de7e328fd92498fd7cf149a0aa887e33f8dfd.tar.xz | |
bootstate: remove need for #ifdef ENV_RAMSTAGE
The BOOT_STATE_INIT_ENTRY macro can only be used in ramstage, however
the current state of the header meant bad build errors in non-ramstage.
Therefore, people had to #ifdef in the source. Remove that requirement.
Change-Id: I8755fc68bbaca6b72fbe8b4db4bcc1ccb35622bd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11492
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/common/spi.c')
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 1d3ebf649e..5d1801253c 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -359,14 +359,13 @@ void spi_init(void) bios_cntl &= ~(1 << 5); pci_write_config_byte(dev, 0xdc, bios_cntl | 0x1); } -#ifndef __SMM__ + static void spi_init_cb(void *unused) { spi_init(); } BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL); -#endif int spi_claim_bus(struct spi_slave *slave) { |