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| author | Kevin Chiu <Kevin.Chiu@quantatw.com> | 2018-07-27 09:38:27 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-07-28 04:21:50 +0000 |
| commit | 030ba1bff3bbf7210fc16fcd4fdd87f597e5bfa7 (patch) | |
| tree | 8277fe486c0e14937e2e064b4da0b0d2ab1a9688 /src/southbridge/intel/common | |
| parent | 6dcb6c2fa400495df97aa2e95a1897cd4b05a1a8 (diff) | |
| download | coreboot-030ba1bff3bbf7210fc16fcd4fdd87f597e5bfa7.tar.xz | |
mainboard/google/kahlee: Fix Micron MT40A512M16LY-075:E POST CRC error
Fix Micron MT40A512M16LY-075:E DRAM SPD CRC error in AGESA MemSPDChecking:
ERROR Event: 04011200 Data: 0, 0, 0, 0
BUG=b:111901461
BRANCH=master
TEST=emerge-grunt coreboot
Change-Id: I85c82fd9294f9146fc23e649436cbcc337c4c961
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/27657
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
0 files changed, 0 insertions, 0 deletions