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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-16 10:04:41 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 07:08:35 +0000 |
commit | 3457df1730bf4446fa0e0042e43cc0c0e7bd1073 (patch) | |
tree | 1977e05f494ad6a4888722dfd8c4d35e81df344b /src/southbridge/intel/common | |
parent | dc2e7c6e0fb1331a7808c226992c71e07f9ca7bd (diff) | |
download | coreboot-3457df1730bf4446fa0e0042e43cc0c0e7bd1073.tar.xz |
sb/intel/common: Properly guard USB debug
The declarations in usb_debug.c needs to be guarded in order to not
conflict with other chipsets.
Change-Id: I84c3401b9419f2878c2cfdf81147fa854018f9ae
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36878
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r-- | src/southbridge/intel/common/Kconfig | 4 | ||||
-rw-r--r-- | src/southbridge/intel/common/Makefile.inc | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 57c0dbe19f..18bcd2e4a6 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -46,6 +46,10 @@ config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT config SOUTHBRIDGE_INTEL_COMMON_FINALIZE bool +config SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG + def_bool n + select HAVE_USBDEBUG + config INTEL_DESCRIPTOR_MODE_CAPABLE def_bool n help diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 9ff0ebc5a1..c8521e1b5a 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -28,9 +28,9 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c -bootblock-$(CONFIG_USBDEBUG) += usb_debug.c -romstage-$(CONFIG_USBDEBUG) += usb_debug.c -ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c +romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c +ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c |