summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/common
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2018-11-14 00:00:35 +0100
committerNico Huber <nico.h@gmx.de>2019-01-06 15:54:19 +0000
commit9faae2b939d0c83632baeefe80bef1739e125018 (patch)
treea3d62f5f14994f1facc2389d189796a836bd8e81 /src/southbridge/intel/common
parentd2f678d3bd6ca4c05fa5c652d6cdf4623543e576 (diff)
downloadcoreboot-9faae2b939d0c83632baeefe80bef1739e125018.tar.xz
Kconfig: Unify power-after-failure options
The newest and most useful incarnation was hiding in soc/intel/common/. We move it into the Mainboard menu and extend it with various flags to be selected to control the default and which options are visible. Also add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the boolean to int conversion into Kconfig: 0 - S5 1 - S0 2 - previous state This patch focuses on the Kconfig code. The C code could be unified as well, e.g. starting with a common enum and safe wrapper around the get_option() call. TEST=Did what-jenkins-does with and without this commit and compared binaries. Nothing changed for the default configurations. Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29680 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/Kconfig2
-rw-r--r--src/southbridge/intel/common/pmutil.h4
-rw-r--r--src/southbridge/intel/common/smihandler.c2
3 files changed, 3 insertions, 5 deletions
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig
index ba53f68423..6a96277844 100644
--- a/src/southbridge/intel/common/Kconfig
+++ b/src/southbridge/intel/common/Kconfig
@@ -29,6 +29,8 @@ config HAVE_INTEL_CHIPSET_LOCKDOWN
config SOUTHBRIDGE_INTEL_COMMON_SMM
def_bool n
+ select HAVE_POWER_STATE_AFTER_FAILURE
+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
bool
diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h
index 2076a3d2c1..7f07a724a3 100644
--- a/src/southbridge/intel/common/pmutil.h
+++ b/src/southbridge/intel/common/pmutil.h
@@ -45,10 +45,6 @@
#define MAINBOARD_POWER_ON 1
#define MAINBOARD_POWER_KEEP 2
-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
-#endif
-
#define PM1_STS 0x00
#define WAK_STS (1 << 15)
#define PCIEXPWAK_STS (1 << 14)
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 6347ad663b..4525934970 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -112,7 +112,7 @@ static void southbridge_smi_sleep(void)
u8 reg8;
u32 reg32;
u8 slp_typ;
- u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
// save and recover RTC port values
u8 tmp70, tmp72;