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author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-28 21:03:51 +0200 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-28 22:07:30 +0200 |
commit | 7f46420f4c85e7b296bfb4e8b3796a152e24b5fb (patch) | |
tree | 104ff4c3bfe92cf77b187594ea48bad2485bf189 /src/southbridge/intel/fsp_bd82x6x/pch.h | |
parent | 456f495d4e3199146590bcb5cd76e12053c33c9e (diff) | |
download | coreboot-7f46420f4c85e7b296bfb4e8b3796a152e24b5fb.tar.xz |
Migrate fsp_206ax to SMM_MODULES
This gets rid of ugly tseg_relocate for fsp_bd82x6x.
This is adaptation of a3e41c089602c58409e8dfd4aceecbdd7d4f4a5b
Change-Id: I4e80e6e98d3a6da3e3e480e9368fae1b3ed67cd6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10353
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x/pch.h')
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/pch.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/pch.h b/src/southbridge/intel/fsp_bd82x6x/pch.h index 9e3b4da1e9..10e536e87f 100644 --- a/src/southbridge/intel/fsp_bd82x6x/pch.h +++ b/src/southbridge/intel/fsp_bd82x6x/pch.h @@ -64,6 +64,11 @@ void intel_pch_finalize_smm(void); #if !defined(__ASSEMBLER__) && !defined(__ROMCC__) #if !defined(__PRE_RAM__) && !defined(__SMM__) #include "chip.h" +/* These helpers are for performing SMM relocation. */ +void southbridge_smm_init(void); +void southbridge_trigger_smi(void); +void southbridge_clear_smi_status(void); + int pch_silicon_revision(void); int pch_silicon_type(void); int pch_silicon_supported(int type, int rev); |