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| author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-07-07 12:57:46 -0500 |
|---|---|---|
| committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-07-14 13:40:07 +0200 |
| commit | ec505ad21c923c114a16b2710a0113f657765430 (patch) | |
| tree | c3ecdb6021982e2d79220b63d40448bebe43baf2 /src/southbridge/intel/fsp_bd82x6x | |
| parent | fb4233bb22602c3802da39200b85845407e0c496 (diff) | |
| download | coreboot-ec505ad21c923c114a16b2710a0113f657765430.tar.xz | |
azalia: fix up and clean up shrinkage of boilerplate code
Should fix regression in HDA verb setup on nvidia mcp55 and intel sch
southbridges. The mcp55 code could not find the mainboard's verb table
because the table was not even being compiled in. The sch boards appeared
to have the same issue.
Intel broadwell and fsp_bd82x6x seemed to have not gotten the boilerplate
shrink, so apply it to those too.
Followup-to: Ib3e09644c0ee71aacb067adaa85653d151b52078
(azalia: Shrink boilerplate)
Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/10826
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x')
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/azalia.c | 6 |
2 files changed, 3 insertions, 5 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index d96e641670..228b6eb5f2 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -39,6 +39,8 @@ smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c early_init.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/fsp_bd82x6x/azalia.c b/src/southbridge/intel/fsp_bd82x6x/azalia.c index e6c9b27ae2..b6f728c4a8 100644 --- a/src/southbridge/intel/fsp_bd82x6x/azalia.c +++ b/src/southbridge/intel/fsp_bd82x6x/azalia.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -91,11 +92,6 @@ no_codec: return 0; } -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { int idx=0; |