diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-13 23:26:07 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:34:35 +0200 |
| commit | 648c9ae3715558db9dd34e414baaeabdd0028dba (patch) | |
| tree | 6760ddc9b2f59b1f3ec4c274c7fbd938f95810cc /src/southbridge/intel/fsp_i89xx/pch.h | |
| parent | 4d7a9a556934b06f27e88810ff2f1e6bd522eb40 (diff) | |
| download | coreboot-648c9ae3715558db9dd34e414baaeabdd0028dba.tar.xz | |
southbridge/intel/fsp_i89xx: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions
generic ACPI definitions.
BUG=chrome-os-partner:54977
Change-Id: Ibf2bc3ae89cb5a013cb1ccc439c906b00bf78d66
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15681
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/fsp_i89xx/pch.h')
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/pch.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/southbridge/intel/fsp_i89xx/pch.h b/src/southbridge/intel/fsp_i89xx/pch.h index fdc61f598d..6d8b873c3e 100644 --- a/src/southbridge/intel/fsp_i89xx/pch.h +++ b/src/southbridge/intel/fsp_i89xx/pch.h @@ -18,6 +18,8 @@ #ifndef SOUTHBRIDGE_INTEL_I89XX_PCH_H #define SOUTHBRIDGE_INTEL_I89XX_PCH_H +#include <arch/acpi.h> + /* PCH types */ #define PCH_TYPE_CC 0x23 /* CaveCreek */ @@ -357,13 +359,6 @@ static const struct dev_irq_regs irq_regs[NUM_IR_DEVS] = { #define GBL_EN (1 << 5) #define TMROF_EN (1 << 0) #define PM1_CNT 0x04 -#define SLP_EN (1 << 13) -#define SLP_TYP (7 << 10) -#define SLP_TYP_S0 0 -#define SLP_TYP_S1 1 -#define SLP_TYP_S3 5 -#define SLP_TYP_S4 6 -#define SLP_TYP_S5 7 #define GBL_RLS (1 << 2) #define BM_RLD (1 << 1) #define SCI_EN (1 << 0) |