diff options
author | Martin Roth <martin@coreboot.org> | 2019-10-23 21:46:03 -0600 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-30 11:16:56 +0000 |
commit | ff744bf0eee875a03dc98dd6792e3ed0ff4456a0 (patch) | |
tree | 691260ffe71abac0bb8e2a5607b0d6f1cfb16028 /src/southbridge/intel/fsp_rangeley/soc.c | |
parent | 5331a7cff9ebf6f92542eee53e6556a4d5a0dc75 (diff) | |
download | coreboot-ff744bf0eee875a03dc98dd6792e3ed0ff4456a0.tar.xz |
src/southbridge: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36333
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/soc.c')
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/soc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c index ec66c430a9..3512f196d3 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.c +++ b/src/southbridge/intel/fsp_rangeley/soc.c @@ -59,7 +59,7 @@ int soc_silicon_supported(int type, int rev) } /* Set bit in Function Disable register to hide this device */ -static void soc_hide_devfn(unsigned devfn) +static void soc_hide_devfn(unsigned int devfn) { /* TODO Function Disable. */ } |