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author | Martin Roth <martinroth@google.com> | 2015-10-11 10:36:26 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2015-10-14 22:49:03 +0000 |
commit | 58562405c8c416a415652516b8af31b204b4ff0d (patch) | |
tree | 3311f3f5feceea80a048337f0485fc9c956ee5ac /src/southbridge/intel/fsp_rangeley/watchdog.c | |
parent | 83e4c5613eecc5283d9a66997dc90e26384f9284 (diff) | |
download | coreboot-58562405c8c416a415652516b8af31b204b4ff0d.tar.xz |
Revert "Remove FSP Rangeley SOC and mohonpeak board support"
This chip is still being used and should not have been deleted. It's
a current intel chip, and doesn't even require an ME binary.
This reverts commit 959478a763c16688d43752adbae2c76e7764da45.
Change-Id: I78594871f87af6e882a245077b59727e15f8021a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11860
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/watchdog.c')
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/watchdog.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/watchdog.c b/src/southbridge/intel/fsp_rangeley/watchdog.c new file mode 100644 index 0000000000..1ea4985769 --- /dev/null +++ b/src/southbridge/intel/fsp_rangeley/watchdog.c @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2011 Google Inc. + * Copyright (C) 2013 Sage Electronic Engineering, LLC. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <console/console.h> +#include <arch/io.h> +#include <device/device.h> +#include <device/pci.h> +#include <watchdog.h> +#include "soc.h" + +void watchdog_off(void) +{ + device_t dev; + u32 value, abase; + + /* Turn off the watchdog. */ + dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); + + /* Enable I/O space. */ + value = pci_read_config16(dev, 0x04); + value |= 1; + pci_write_config16(dev, 0x04, value); + + /* Get TCO base. */ + abase = (pci_read_config32(dev, ABASE) & ~0xf); + + /* Disable the watchdog timer. */ + value = inw(abase + 0x68); + value |= 1 << 11; + outw(value, abase + 0x68); + + /* Clear TCO timeout status. */ + outw(0x0008, abase + 0x64); + outw(0x0002, abase + 0x66); + + printk(BIOS_DEBUG, "TCO Watchdog disabled\n"); +} |