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| author | Subrata Banik <subrata.banik@intel.com> | 2019-03-20 14:29:47 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-21 16:18:05 +0000 |
| commit | 4a0f07166f0f0b6eb799e2670b47ce31d0cfc60b (patch) | |
| tree | 6a4ca1aad66f7ca8d2886f7a607132269b82f663 /src/southbridge/intel/fsp_rangeley | |
| parent | 6520ec0650c4af616e1da92a5d90263e895f50ca (diff) | |
| download | coreboot-4a0f07166f0f0b6eb799e2670b47ce31d0cfc60b.tar.xz | |
{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()
This patch removes local definitions of sub_system function and make use
of common function pci_dev_set_subsystem().
Change-Id: I91982597fdf586ab514bec3d8e4d09f2565fe56d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31982
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: David Guckian
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/lpc.c | 13 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/sata.c | 13 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/smbus.c | 14 |
3 files changed, 3 insertions, 37 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index 711778e125..4118e5fded 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -417,17 +417,6 @@ static void soc_lpc_enable(struct device *dev) soc_enable(dev); } -static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) -{ - if (!vendor || !device) { - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - pci_read_config32(dev, PCI_VENDOR_ID)); - } else { - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - ((device & 0xffff) << 16) | (vendor & 0xffff)); - } -} - static void southbridge_inject_dsdt(struct device *dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); @@ -448,7 +437,7 @@ static void southbridge_inject_dsdt(struct device *dev) } static struct pci_operations pci_ops = { - .set_subsystem = set_subsystem, + .set_subsystem = pci_dev_set_subsystem, }; static struct device_operations device_ops = { diff --git a/src/southbridge/intel/fsp_rangeley/sata.c b/src/southbridge/intel/fsp_rangeley/sata.c index 3f72a3dfe9..58388a2fab 100644 --- a/src/southbridge/intel/fsp_rangeley/sata.c +++ b/src/southbridge/intel/fsp_rangeley/sata.c @@ -96,19 +96,8 @@ static void sata_enable(struct device *dev) { } -static void sata_set_subsystem(struct device *dev, unsigned vendor, unsigned device) -{ - if (!vendor || !device) { - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - pci_read_config32(dev, PCI_VENDOR_ID)); - } else { - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - ((device & 0xffff) << 16) | (vendor & 0xffff)); - } -} - static struct pci_operations sata_pci_ops = { - .set_subsystem = sata_set_subsystem, + .set_subsystem = pci_dev_set_subsystem, }; static struct device_operations sata_ops = { diff --git a/src/southbridge/intel/fsp_rangeley/smbus.c b/src/southbridge/intel/fsp_rangeley/smbus.c index 90b0420465..83533f1d03 100644 --- a/src/southbridge/intel/fsp_rangeley/smbus.c +++ b/src/southbridge/intel/fsp_rangeley/smbus.c @@ -40,20 +40,8 @@ static struct smbus_bus_operations lops_smbus_bus = { .read_byte = lsmbus_read_byte, }; -static void smbus_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) -{ - if (!vendor || !device) { - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - pci_read_config32(dev, PCI_VENDOR_ID)); - } else { - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - ((device & 0xffff) << 16) | (vendor & 0xffff)); - } -} - static struct pci_operations smbus_pci_ops = { - .set_subsystem = smbus_set_subsystem, + .set_subsystem = pci_dev_set_subsystem, }; static void rangeley_smbus_read_resources(struct device *dev) |