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authorElyes HAOUAS <ehaouas@noos.fr>2018-12-01 12:19:52 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-05-13 09:30:54 +0000
commit0c22d2fe46fbc59fa12fec46c21874f422b10e44 (patch)
tree56d001f97110805286469be248de0790d3eed7d4 /src/southbridge/intel/fsp_rangeley
parent9005071c5fb1d75b2a54aa0b3e7af47e25d2de54 (diff)
downloadcoreboot-0c22d2fe46fbc59fa12fec46c21874f422b10e44.tar.xz
{bd82x6x,i82801gx,ibexpeak,lynxpoint}: Remove dead code and use macro
Use BIOS_CNTL defined macro instead of magic number. Change-Id: I0d2b555ada9c2893af4f85422128f5a8b04e2fc6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r--src/southbridge/intel/fsp_rangeley/lpc.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 4118e5fded..ba5e04bd3c 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -38,9 +38,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-#define TEST_SMM_FLASH_LOCKDOWN 0
-
typedef struct southbridge_intel_fsp_rangeley_config config_t;
static void soc_enable_apic(struct device *dev)