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author | Martin Roth <martinroth@google.com> | 2018-05-07 20:45:21 -0500 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-09 10:14:27 +0000 |
commit | 621e4d8b48a1485ff6457524af88b3da55e604cb (patch) | |
tree | ae6e60a14375514f06fddae96a1d712337d9b7ce /src/southbridge/intel/fsp_rangeley | |
parent | 49a4c6af58c506e95c7ac70b4e759b34f80613d0 (diff) | |
download | coreboot-621e4d8b48a1485ff6457524af88b3da55e604cb.tar.xz |
src/southbridge: Serialize methods with named objects inside
Change-Id: Ia9d884d7247f0cc3a175de31649d0163c69f1299
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/acpi/sata.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/acpi/sata.asl b/src/southbridge/intel/fsp_rangeley/acpi/sata.asl index e7011ec6fb..3855633a67 100644 --- a/src/southbridge/intel/fsp_rangeley/acpi/sata.asl +++ b/src/southbridge/intel/fsp_rangeley/acpi/sata.asl @@ -28,7 +28,7 @@ Device (SATA) Name (_ADR, 0) // Get Timing Mode - Method (_GTM) + Method (_GTM, 0, Serialized) { Name(PBUF, Buffer(20) { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |