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authorElyes HAOUAS <ehaouas@noos.fr>2019-03-18 22:49:36 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-20 20:27:51 +0000
commita1e22b8192d5fc85995a41d0961c25293ba4391f (patch)
tree7b7dbc885d3ac99fe029cf0961eda1052e753dc1 /src/southbridge/intel/fsp_rangeley
parent0eb4db185cfef44ddfdbd91d4fe69a48c127fa84 (diff)
downloadcoreboot-a1e22b8192d5fc85995a41d0961c25293ba4391f.tar.xz
src: Use 'include <string.h>' when appropriate
Drop 'include <string.h>' when it is not used and add it when it is missing. Also extra lines removed, or added just before local includes. Change-Id: Iccac4dbaa2dd4144fc347af36ecfc9747da3de20 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r--src/southbridge/intel/fsp_rangeley/gpio.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c2
3 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c
index 831b1696c4..6db431cb16 100644
--- a/src/southbridge/intel/fsp_rangeley/gpio.c
+++ b/src/southbridge/intel/fsp_rangeley/gpio.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <string.h>
#include <arch/io.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 2891ca4ae7..14611b3891 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <string.h>
#include <lib.h>
#include <timestamp.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index e65576769c..afd89a7dba 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -14,9 +14,9 @@
*/
/* This file is derived from the flashrom project. */
+
#include <stdint.h>
#include <stdlib.h>
-#include <string.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <device/mmio.h>