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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-11-10 20:29:08 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-29 12:21:03 +0000 |
commit | f5b974e4b7a54d2ab9b59101ce17576e2e16e3f0 (patch) | |
tree | 67b2a1022c43e7ffd9c3680382125f23970fa665 /src/southbridge/intel/fsp_rangeley | |
parent | 95370e1f041f0236770937599286e020d6e75c19 (diff) | |
download | coreboot-f5b974e4b7a54d2ab9b59101ce17576e2e16e3f0.tar.xz |
arch/acpi.h: Add some update to version 6.2a
Some tables updated to comply with ACPI version 6.2a.
Change-Id: I91291c8202d1562b720b9922791c6282e572601f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/29569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/acpi.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/acpi.c b/src/southbridge/intel/fsp_rangeley/acpi.c index ca711dce24..efe5412c9f 100644 --- a/src/southbridge/intel/fsp_rangeley/acpi.c +++ b/src/southbridge/intel/fsp_rangeley/acpi.c @@ -120,10 +120,8 @@ void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) fadt->reset_reg.addrh = 0x00; fadt->reset_value = 6; - /* Reserved Bits */ - fadt->res3 = 0x00; /* reserved, MUST be 0 ACPI 3.0 */ - fadt->res4 = 0x00; /* reserved, MUST be 0 ACPI 3.0 */ - fadt->res5 = 0x00; /* reserved, MUST be 0 ACPI 3.0 */ + fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */ + fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */ /* Extended ACPI Pointers */ fadt->x_firmware_ctl_l = (unsigned long)facs; |