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authorArthur Heymans <arthur@aheymans.xyz>2017-04-12 17:01:31 +0200
committerMartin Roth <martinroth@google.com>2017-08-06 23:26:15 +0000
commit16fe79048f5254661ff2342aa481cbb44657b7ff (patch)
tree5ad72bc5c5a97ca9a7a47f5ab24bbe622f12e9e9 /src/southbridge/intel/i3100/smbus.c
parent12d010306b3892b01350e96d83275206215d9f31 (diff)
downloadcoreboot-16fe79048f5254661ff2342aa481cbb44657b7ff.tar.xz
sb/intel/*: Use common SMBus functions
All Intel southbridges implement the same SMBus functions. This patch replaces all these similar and mostly identical implementations with a common file. This also makes i2c block read available to all those southbridges. If the northbridge has to read a lot of SPD bytes sequentially, using this function can reduce the time being spent to read SPD five-fold. Change-Id: I93bb186e04e8c32dff04fc1abe4b5ecbc4c9c962 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19258 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i3100/smbus.c')
-rw-r--r--src/southbridge/intel/i3100/smbus.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i3100/smbus.c b/src/southbridge/intel/i3100/smbus.c
index 32cf709b0c..850982adc5 100644
--- a/src/southbridge/intel/i3100/smbus.c
+++ b/src/southbridge/intel/i3100/smbus.c
@@ -21,8 +21,8 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <arch/io.h>
+#include <southbridge/intel/common/smbus.h>
#include "i3100.h"
-#include "smbus.h"
static int lsmbus_read_byte(device_t dev, u8 address)
{